Abstract: This applicaTIon note discusses the similariTIes and differences, both hardware and software, between the older MAX7219 and MAX7221 LED display drivers and the newer MAX6950 and MAX6951 drivers. These drivers are five-digit or eight-digit common-cathode LED display drivers controlled through a high-speed serial interface.
This applicaTIon note discusses the similariTIes and differences, both hardware and software, between the older MAX7219 and MAX7221 LED display drivers and the newer MAX6950 and MAX6951 drivers. These drivers are five-digit or eight-digit common-cathode LED display drivers controlled through a high-speed serial interface. Table 1 shows the hardware differences between the drivers.
Table 1. Comparison of Hardware Features
|
MAX7219 |
MAX7221 |
MAX6950 |
MAX6951 |
Supply voltage minimum |
4V |
2.7V |
Supply voltage maximum |
5.5V |
5.5V |
Maximum segment current |
40mA |
40mA (V+ = 3.0V) 12mA (2.7V = V+ = 3.0V) |
Maximum number of seven-segment digits |
8 |
5 |
8 |
Types of seven-segment digits that can be used |
Any common-cathode type |
Common-cathode types where each digit has independent anode or segment connections |
Maximum number of discrete LEDs |
64 |
40 |
64 |
Can drive 8x8 matrix digits? |
Both packaged and discrete |
No
|
Discrete only |
Interface type |
4-wire serial |
SPI |
Interface speed maximum |
10Mbits-1 |
26Mbits-1 |
Interface Dout pin for cascading devices? |
Yes |
No |
Interface logic input thresholds |
Low: 0.8V max, high: 3.5V min |
Low: 0.4V max, high: 2.4V min |
Through-hole package |
24 narrow DIP |
|
Surface-mount package |
24 wide SO |
16 QSOP |
Slew-limited LED drive outputs? |
Yes |
Yes |
Multiplex clock generation |
Internal fixed |
External or internal, 1MHz to 8MHz |
Multiplex timing period per digit |
150µs |
200µs |
Automatic segment blinking? |
No |
Yes |
LED intensity levels |
16 levels - off, then 1/16 to 15/16 PWM with 1/16 steps
|
Character decoding |
Code B: 0 - 9, -, E, H, L, P, blank |
Hexadecimal: 0 - 9, A - F |
The newer MAX6950 and MAX6951 drivers are the only choice for systems where 3V or 3.3V is the highest supply voltage available. Their lower logic input thresholds also allow them to be interfaced directly to a microprocessor running from as low as 2.5V. The use of the lowest-possible supply voltage naturally minimizes driver dissipation, making it easier to run the driver at full output current for the brightest display.
The MAX7219 or MAX7221 drivers should be used where the display employed is the "stick" type with the segment connections communed internally. An eight-digit common-cathode stick display would have 8 cathode pins (one for each digit cathode) and 8 segment pins (wired internally to each digit). The MAX6950 and MAX6951 drivers use a multiplexing scheme that changes the segment connections for each digit and cannot be used with internally communed multi-digit types.
Table 2 shows the MAX7219/MAX7221 register set compared with the MAX6950/MAX6951 register set. Although the register functionality is broadly similar, the register addresses are different. However, it is possible to write software code that will interface both register sets correctly. This would allow a processor to write either a MAX7221 or a MAX6951 and achieve the same result. The technique involves selecting a subaddress range for the MAX7221 that does not conflict with the MAX6951 registers. This is shown below as the recommended hex codes. When these MAX7221 registers are written, the appropriate MAX6951 registers are written also, to the addresses in italics. The only problem with this approach is that the MAX6950/MAX6951 control registers (addresses 01 to 07) conflict with the MAX7219/MAX7221 digit registers. The solution is to rewrite the conflicting digit register after every change to the corresponding control register. This seems to be a burden at first, but in practice the control registers are rarely changed after initialization, with the exception of the Intensity register.
Dual-target code will not be able to take advantage of the blink features of the MAX6950/MAX6951 in order to maintain lowest-common-denominator functionality. Also, the decoded font characters above nine are different between the parts.
Table 2. Register Address Map Comparison
MAX7219 AND MAX7221 REGISTERS |
HEX CODE |
RECOMMENDED HEX CODE |
MAX6950 AND MAX6951 REGISTERS |
HEX CODE
|
No-Op |
X0 |
00 |
No-Op |
00 |
Digit 0 |
X1 |
11 |
|
60 |
Digit 1 |
X2 |
12 |
|
61 |
Digit 2 |
X3 |
13 |
|
62 |
Digit 3 |
X4 |
14 |
|
63 |
Digit 4 |
X5 |
15 |
|
64 |
Digit 5 |
X6 |
16 |
|
65 |
Digit 6 |
X7 |
17 |
|
66 |
Digit 7 |
X8 |
18 |
|
77 |
Decode Mode |
X9 |
19 |
Conflicts with MAX7219/MAX7221 Digit 0 |
01 |
Intensity |
XA |
1A |
Conflicts with MAX7219/MAX7221 Digit 1 |
02 |
Scan Limit |
XB |
1B |
Conflicts with MAX7219/MAX7221 Digit 2 |
03 |
Configuration |
XC |
1C |
Conflicts with MAX7219/MAX7221 Digit 3 |
04 |
Display Test |
XF |
1D |
Conflicts with MAX7219/MAX7221 Digit 6 |
07 |
|
|
|
Decode Mode |
01 |
|
|
|
Intensity |
02 |
|
|
|
Scan Limit |
03 |
|
|
|
Configuration |
04 |
|
|
|
Display Test |
07 |
|
|
|
Digit 0 plane P0 only (plane 1 unchanged) |
20 |
|
|
|
Digit 1 plane P0 only (plane 1 unchanged) |
21 |
|
|
|
Digit 2 plane P0 only (plane 1 unchanged) |
22 |
|
|
|
Digit 3 plane P0 only (plane 1 unchanged) |
23 |
|
|
|
Digit 4 plane P0 only (plane 1 unchanged) |
24 |
|
|
|
Digit 5 plane P0 only (plane 1 unchanged) |
25 |
|
|
|
Digit 6 plane P0 only (plane 1 unchanged) |
26 |
|
|
|
Digit 7 plane P0 only (plane 1 unchanged) |
27 |
|
|
|
Digit 0 plane P1 only (plane 0 unchanged) |
40 |
|
|
|
Digit 1 plane P1 only (plane 0 unchanged) |
41 |
|
|
|
Digit 2 plane P1 only (plane 0 unchanged) |
42 |
|
|
|
Digit 3 plane P1 only (plane 0 unchanged) |
43 |
|
|
|
Digit 4 plane P1 only (plane 0 unchanged) |
44 |
|
|
|
Digit 5 plane P1 only (plane 0 unchanged) |
45 |
|
|
|
Digit 6 plane P1 only (plane 0 unchanged) |
46 |
|
|
|
Digit 7 plane P1 only (plane 0 unchanged) |
47 |
|
|
|
Digit 0 plane P0 and plane P1 (with same data) |
60 |
|
|
|
Digit 1 plane P0 and plane P1 (with same data) |
61 |
|
|
|
Digit 2 plane P0 and plane P1 (with same data) |
62 |
|
|
|
Digit 3 plane P0 and plane P1 (with same data) |
63 |
|
|
|
Digit 4 plane P0 and plane P1 (with same data) |
64 |
|
|
|
Digit 5 plane P0 and plane P1 (with same data) |
65 |
|
|
|
Digit 6 plane P0 and plane P1 (with same data) |
66 |
|
|
|
Digit 7 plane P0 and plane P1 (with same data) |
67 |